A copper damascene interconnect provided in a high-performance LSI is formed by chemical mechanical polishing (hereinafter may be referred to as “CMP”). CMP includes a first polishing step that mainly polishes copper, and a second polishing step that polishes unnecessary metal, a barrier metal film, and an insulating film. The first polishing step is required to polish the copper film at a high speed and suppress copper dishing without substantially polishing the barrier metal film formed of tantalum, titanium, ruthenium, cobalt, a nitride thereof, or the like. The second polishing step is required to form a flat polished surface by controlling the polishing rate ratio of the copper interconnect, the barrier metal film, and the insulating film within a given range.
In recent years, a porous low-dielectric-constant insulating film having a dielectric constant (k) of less than 2.5 has been studied instead of a p-TEOS film, etc. along with scaling down of semiconductor devices. Such a low-dielectric-constant insulating film has low mechanical strength, and is likely to absorb a polishing slurry due to porosity. Therefore, the electrical properties of the low-dielectric-constant insulating film may deteriorate due to polishing. Accordingly, development of a novel chemical mechanical polishing slurry that ensures flatness and does not cause a deterioration in electrical properties of the low-dielectric-constant insulating film due to polishing has been desired.
For example, a polishing composition disclosed in Japanese Patent No. 3337464 that contains a polymer having an anionic functional group may not achieve flatness when used to polish a substrate that includes a porous low-dielectric-constant insulating film having a dielectric constant (k) of less than 2.5, since the low-dielectric-constant insulating film is polished at a high polishing rate. For example, when chemically and mechanically polishing a porous low-dielectric-constant insulating film having a dielectric constant (k) of less than 2.5 using a polishing composition disclosed in JP-A-2005-14206 that contains an anionic surfactant and a polyoxyalkylene alkyl ether nonionic surfactant or a polishing composition disclosed in JP-A-2005-129637 that contains a polyether-modified silicone, polishing defects (e.g., scratches) may occur in the low-dielectric-constant insulating film having low mechanical strength. Moreover, the hygroscopicity of the low-dielectric-constant insulating film may deteriorate due to polishing so that the electrical properties may deteriorate.